1. Field of the Invention
The present invention relates to methods of manufacturing semiconductor devices, and more particularly to a method of manufacturing a semiconductor device using a wafer having a thin portion of small thickness.
2. Description of the Background Art
In recent years, there has been a demand for using a thinner wafer in a method of manufacturing a semiconductor device. In order to achieve a higher density package by three-dimensional mounting and the like for LSIs, the thickness of a wafer upon completion of the process has been reduced to as small as about 10 μm.
For power devices such as IGBTs (Insulated Gate Bipolar Transistors) and MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), a semiconductor substrate is subjected to a thinning process to improve current-carrying characteristics typified by ON characteristics, for applications as an inverter circuit of an industrial motor, a motor for a vehicle and the like, and as a power conversion semiconductor switch of various types of power supply devices. To improve cost performance and characteristics, a semiconductor device has recently been manufactured by a process which utilizes an ultra-thin wafer as small as about 50 μm, using a wafer material made with the FZ (Floating Zone) method.
In general, a wafer is thinned by wet etching or dry etching for removing processing distortion created by back grinding, chemical mechanical polishing and mechanical polishing. Then, a diffusion layer is formed by ion implantation and heat treatment, and an electrode is formed by sputtering or the like, on a back surface. With such method, the frequency of occurrence of cracking of a wafer when processing the back surface of the wafer is increasing.
Thus, in order to thin a wafer, a method of processing a wafer by thinning only a central portion of the wafer while maintaining a thick outer circumferential portion of the wafer has recently been proposed (Japanese Patent Laying-Open No. 2007-019379). By using such wafer with a rib having the thick portion and the thin portion, the warpage of the wafer is significantly relieved to facilitate wafer transfer in a processing device, and the strength of the wafer is significantly improved during handling of the wafer, thereby reducing the cracking and chipping of the wafer.
Such wafer with a rib has the effect of relieving the warpage and improving the strength of the wafer during a wafer process. On the other hand, since the portions of different thicknesses are present in the same wafer plane, if a wafer is diced in accordance with the thinned device region, the depth of dicing of the rib portion will be insufficient, resulting in lowered quality of the dicing process. Moreover, the degree of attachment of dicing tape will be insufficient in the vicinity of the rib portion due to the unevenness caused by the rib portion, resulting in lowered accuracy of the dicing process.
For example, Japanese Patent Laying-Open No. 2010-093005 proposes a method of attaching a wafer with a rib to dicing tape, then performing dicing from the device surface side in accordance with a thinned device region, expanding the dicing tape, and then picking up only chips each having a semiconductor device fabricated therein.
To address the problem as described above, for example, Japanese Patent Laying-Open No. 2011-009341 proposes a method of filling a recess of a wafer with a rib with a resist agent, removing the rib portion by dicing, then removing the resist agent by wet etching or the like, and attaching the wafer to dicing tape.